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Instructions/Please Read Carefully!

In taking this examination, you agree that all work recorded herein is your own. A student caught in the act of cheating will be given a grade of F on this examination and a letter will be written to his or her file.

Read the questions carefully. If something appears ambiguous, raise your hand and ask, the exam may have bugs. Points have been assigned according to the formula such that 1 point = 1 exam minutes, so pace yourself accordingly. There are 80 points on this test and you have 80 minutes to complete the exam. The act of taking this exam and writing your name automatically earns you an additional 20 points. This gives you a total of 100 exam points.

Please be sure to answer all questions. A partly answered question may be awarded some points. An blank question is awarded no points.

Please check over your work, if you have extra time. Points are not awarded for tests handed in early.

All work is to be done on the attached sheets and under no circumstances are blue books or loose sheets to be used. Write your name at the top and do not proceed until your are told to do so.

Implement a Combinational Logic Design (45 points)

Implement a combinational logic circuit that netages a 4 bit number using 2's complement representation. IGNORE THE CARRY BIT. For full credit, complete each of the steps below. Each step is worth 5 points.

A) complete the given truth table

B) number the given truth table in base 10

C) number the given k-maps in base 10

D) write the truth table in the k-maps (correct base 10 numbers help here)

E) loop the k-maps (get complete cover with a minimum number of loops)

F) write down the output functions in minimized sum of product form :

G) Draw a network using ONLY AND gates, OR gates and INVERTERS which has
A+ as its output

H) Draw a networks using ONLY NAND gates, which has B+ as its output

I) Using the following decoder, draw the wires you need to implement C+

Short Answer (5 points each) Circle T if the statement is true, otherwise circle F for false.

1. Any Boolean function can be generated using demultiplexors alone. T F

2. A read-only memory (ROM) can be viewed as a programmable AND/OR array in which the AND plane is programmed as a full decoder. T F

Fill in the blank with the correct answer:

3. The canonical SOP form of an expression results in a __________level circuit. Assume that it takes one gate delay to create a literals inverse.

4. If you built a 64:1 multiplexer from 4:1 mux's, how many 4:1 mux's would you need?__________

5. In a carry lookahead adder, the correct equation for the carry input to the second stage (C2) is:

(a) C2=G1+P1C0
(b)C2=G0+P1C1
(c)C2=G1+P1G0+P1P0C1
(d)C2=G1+P1G0+P1P0C0

6. Find the dual and complement of the following expression. (Do not simplify.)

F = [[1 + (a + b')c + d'e']][f' + gh'''(i + j)] + k*0

7 Given that ,
Find the minterm expansion for F.

8. Given the maxterm list
find the canonical product-of-sums expression